Structures forming integrated circuits and other nanotechnology have dimension on the nanometer scale. Many processes that were useful for structures on a larger scale are not adequate for processing structures on a nanoscale. One method of observing the structures for process development, process control, and defect analysis is to expose a portion of the structure using a focused ion beam and observe the exposed structure using a scanning electron microscope (SEM) or a transmission electron microscope (TEM). When the ion beam mills material to expose a structure for observation, the ion beam can distort the structure and create artifacts that interfere with the observation.
A high aspect ratio (HAR) structure is a structure having a height that is much greater than its width. For example, a feature having a height three times greater than its width would be considered a high aspect ratio feature. For example, a hole between layers in an integrated circuit may have a height that is several times greater than its width. In analyzing high aspect ratio structures, such as unfilled contacts or vias, in integrated circuits, such as 3D NAND circuits used in flash memory, the conventional ion beam sample preparation process causes conspicuous artifacts, such as structure distortion, and the ion beam curtain effect.
The ion beam curtain effect, or curtaining, occurs when materials are removed at different milling rates. This can happen when milling a feature comprised of multiple materials that are removed at different rates by the same beam. This can also happen when milling a surface having an irregular shape. For example, a feature of interest can be a through-silicon vias (TSV). Cross-sectioning TSVs is a common practice in semiconductor labs to characterize voids and surface interfaces. Due to the depth of TSVs (typically 50-300 nm), milling a cross section of a TSV with an ion beam can result in substantial curtaining.
When there are unfilled holes on a sample, there are large differences in the milling rates between the material and areas adjacent to the open area or hole. The large difference in milling rates results in curtaining or waterfall effects that distort the shape of the hole. Structure damage and artifacts of the ion beam process make it difficult to perform high aspect ratio vertical structure analysis.
Because of the damage and artifacts caused by the ion beam milling to expose the features, the images do not faithfully show the results of the fabrication process. This interferes with measurements and with an assessment of the fabrication process since the image and measurements show the results of the sample preparation and not just the manufacturing process.
Typically ion beam-induced deposition is used to fill holes in preparing semiconductor structures for analysis. In filling high aspect ratio holes using charged particle beam-induced deposition, voids are often created as the filling of the hole is uneven, and the filling tends to pinch off a region, closing it off to the beam and the precursor gas.
As the device structure decreases in size, less than 100 nm range critical dimension (CD), and the number of layers increases, new fabrication technologies face huge demands, such as creating finely stacked layers on complex structures like deep trenches, high aspect ratio (HAR) structures, channel holes or channel lines with diameters less than 20 nm, including features on temperature-sensitive and energy-sensitive materials like high-K polymer materials for IC devices. So far, conventional technology is unable to fill gaps locally without creating voids in filling structures or without causing artifacts, such as structure distortion, or the ion beam curtain effect.
A method for filling high aspect ratio holes without altering the structure or creating artifacts is needed.